Designers of high-reliability devices can gain significant insights from the analysis of previous device failures. STS has a comprehensive set-up for failure analysis. We use advanced tools and techniques together with analytical interpretation to identify package defects and electrical over stress (EOS) mechanisms, isolate the failure and characterize the failure modes.
STS follows a three-step process for failure analysis:
- Pinpoint defect using non-invasive microscopy techniques such as x-ray, optical microscopy and scanning acoustic microscopy
- Localize and reproduce the failure with pin testing, static DC biasing, liquid crystal fault isolation and other technologies
- Determine the root cause with a range of analytic techniques such as scanning electron microscopy, dynamic electroluminescence imaging and fluorescent microthermal imaging
STS seamlessly support the product time-to-market needs and the quality objectives of their customers by helping to minimize design, manufacturing, and testing costs.
STS has recently augmented its failure analysis lab with the addition of the new Topography and Deformation Measurements TDM® Compact platform by Insidix. As a milestone in a constantly expanding line, the TDM® system integrates real-time quality evaluation with faster measurement of out-of-plane and in-plane deformations.
The STS Advantage
- Comprehensive failure analysis process
- Extensive test and reliability engineering expertise
- Real-time quality evaluation and fast measurement with Insidix TDM platform
- CPUs, SIPs and SOCs
- High-speed memories and data converters
- RF devices
- Scanning electron microscopy
- Dynamic electroluminescence imaging
- Fluorescent microthermal imaging
- Scanning acoustic microscopy
- Emission microscopy
- Optical beam induced current
- X-Ray imaging
- Backside emission microscopy